With the expansion of digital television, signal processing equipment which can process digital television signals transmitted over cable and over terrestrial channels is required. The provision of a single chip receiver capable of processing both types of digital television signals is desirable. Furthermore, the implementation of such a single chip receiver in CMOS technology is desirable due to the repeatability and cost advantage which can be achieved using CMOS processes. However, so far such a fully integrated single chip receiver has not yet been successfully provided. One of the difficulties in providing such a single chip integrated receiver lies in the requirement of providing a suitable variable gain amplifier, and in particular, a variable gain amplifier with low noise characteristics in CMOS which is suitable for terrestrial digital television signals.
Various designs of variable gain amplifiers with low noise characteristics are known. The classic approach used in cable tuner designs is the application of a PIN-diode attenuator in front of a fixed gain low noise amplifier. Such an amplifier is disclosed by Maxim Integrated Products Inc. in their data sheet “MAX 3524-low-noise high linearity broad band amplifier”, Revision 0, 2000, and by Alpha Industries Inc. in a publication entitled “A CATV attenuator using the single package SMP1307-027 PIN-diode array”, application note APN 1017 http:\\www.alphaind.com. While such circuits provide good performance characteristics, they are not readily integratable, and have a high power requirement.
U.S. Pat. No. 6,218,899 of Ezell discloses another form of variable gain amplifier in which the gain of a common source device is varied by means of both the source degeneration and load resistance. When the source degeneration resistance is increased, the feedback factor increases and causes linearity to improve. However, the variation range of the source degeneration resistance, and hence linearity improvement is limited by headroom constraints, particularly in a low voltage environment. In order to meet peak two-one third order intercept point (IIP3) requirements, a high initial linearity is required, which results in a high power consumption.
Kaunisto, et al in an article entitled “Linear control wide band CMOS attenuator”, The 2001 Symposium on Circuits and Systems, 2001, ISCAS 2001, Volume 4, 2001 discloses a variable attenuator suitable for constructing a variable gain amplifier. In the device of Kaunisto, et al, a Pi- or T-type attenuator may be implemented with MOSFETs similar to the technology used in variable attenuators implemented in GaAs. A recent example implemented in a 0.8 μm CMOS process exhibits a minimum insertion loss of 3.3 dB and a peak IIP3 of only 15 dBm. However, such performance is insufficient for cable and terrestrial digital television applications.
Classic bipolar or MOSFET variable-gain amplifier circuits which attenuate the signal at the output of a transconductance stage in the current domain are disclosed in papers entitled “A DC to 1-GHz differential monolithic variable-gain amplifier”, by Meyer et al, IEEE JSSC, Volume 26, No. 11, November 1991, and “A low-power low-noise accurate linear-in-dB variable-gain amplifier with 500-MHz bandwidth” by Otaka et al, IEEE JSSC, Volume 35, No. 12, December 2000. With these circuits a large attenuation range and an accurate gain control characteristic can be achieved. However, a problem with these circuits arises from the fact that the signal passes the transconductance stage without any prior attenuation, and therefore the overall linearity is ultimately limited by the linearity of the transconductance stage. CMOS implementations of these circuits is disclosed in an article entitled “A temperature-stable CMOS variable-gain amplifier with 80 dB linearly controlled gain range” by Yamaji et al, IEEE JSSC, Volume 37, No. 5, May 2002. Targeted at different applications, these implementations do not meet the performance requirements for a broadband radio frequency receiver. In the article entitled “A CMOS broadband tuner IC”, Connell discloses an approach which bears similarities to the classic output current steering attenuation scheme which has been used for a variable gain amplifier. Despite good linearity properties, the gain range and the peak IIP3 of the circuit remains below the target requirements for terrestrial DTV reception.
A variable gain amplifier is disclosed in a data sheet entitled “AD8367 500 MHz, linear-in-dB VGA with AGC detector” of Analog Devices, Inc., Revision 0, 2001. In this variable gain amplifier a multitude of transconductance stages are connected to a resistive ladder divider The gain of the amplifier is controlled by some form of control circuitry. Apart from a large attenuation range, the main advantage of the resistive ladder variable-gain amplifier is the attenuation of the signal in a highly linear passive structure before it is processed in a transconductance stage. In this way the IIP3 increases with increasing attenuation. CMOS implementations of the architecture with discrete interpolation circuits have been suggested. The main disadvantage of the architecture is the additional noise contributed by the resistive ladder at the input of the amplifier. A commercial 45 dB gain range 500 MHz variable-gain amplifier exhibits a minimum noise figure of 7.5 dB referred to a source impedance of 200D. Although further improvements seem possible, the noise figure levels required for terrestrial reception are unlikely to be achievable. If MOSFETs are used, the large input capacitance of MOSFETs makes it difficult tQ achieve a flat frequency response over the wide input frequency range.
Accordingly, none of the above variable gain amplifiers are ideally suited for amplifying terrestrial digital television signals, in that they all suffer from one shortcoming or another.
There is therefore a need for a variable gain amplifier which is suitable for amplifying both cable and terrestrial digital television signals and which is suitable for implementing in a CMOS process. Indeed, there is also a need for a variable gain amplifier which is suitable for implementing in a CMOS process which is suitable for amplifying signals over a relatively broad band of frequencies.
The present invention is directed towards providing such a variable gain amplifier.